You ‘ll think of me !!

I woke up early this morning around 4am
With the moon shining bright as headlights on the interstate
I pulled the covers over my head and tried to catch some sleep
But thoughts of us kept keeping me awake
Ever since you found yourself in someone else’s arms
I’ve been tryin’ my best to get along
But that’s OK
There’s nothing left to say, but

Take your records, take your freedom
Take your memories I don’t need’em
Take your space and take your reasons
But you’ll think of me
And take your cat and leave my sweater
‘Cause we have nothing left to weather
In fact I’ll feel a whole lot better
But you’ll think of me, you’ll think of me

I went out driving trying to clear my head
I tried to sweep out all the ruins that my emotions left
I guess I’m feeling just a little tired of this
And all the baggage that seems to still exist
It seems the only blessing I have left to my name
Is not knowing what we could have been
What we should have been
So

Take your records, take your freedom
Take your memories I don’t need’em
Take your space and take your reasons
But you’ll think of me
And take your cat and leave my sweater
‘Cause we have nothing left to weather
In fact I’ll feel a whole lot better
But you’ll think of me

Someday I’m gonna run across your mind
Don’t worry, I’ll be fine
I’m gonna be alright
While you’re sleeping with your pride
Wishing I could hold you tight
I’ll be over you
And on with my life

So take your records, take your freedom
Take your memories I don’t need’em
And take your cat and leave my sweater
‘Cause we have nothing left to weather
In fact I’ll feel a whole lot better
But you’ll think of me

So take your records, take your freedom
Take your memories I don’t need’em
Take your space and all your reasons
But you’ll think of me
And take your cat and leave my sweater
‘Cause we got nothing left to weather
In fact I’ll feel a whole lot better
But you’ll think of me, you’ll think of me, yeah

And you’re gonna think of me
Oh someday baby, someday

XAML and WPF :S (The kool words)

What is XAML?

(Extensible Application Markup Language; pronounced “zammel”)

XAML is a declarative XML-based language that defines objects and their properties in XML. XAML syntax focuses upon defining the UI (user interface) for the Windows Presentation Foundation (WPF) and is therefore separate from the application code behind it.

Although XAML is presently for use on the Windows platform, the WPF/E (Windows Presentation Foundation/Everywhere) initiative will eventually bring XAML to other platforms and devices.

XAML syntax describes objects, properties and their relationships to one another. Generic XAML syntax defines the relationship between objects and children. Properties can be set as attributes or by using ‘period notation’ to specify the object as a property of its parent.

For example:
<object>
<child property=”x” property=”y”>
   <child.property>
      <class property=”u” property=”v”/>
   </child.property>
 </child>
  <child>
  </child>
</object>

Things You Should Know About XAML

• Sometimes, XAML and WPF are used interchangeably … they do go hand-in-hand, but they are not the same. XAML is a type of XML-based markup. WPF is a graphics API.

• XAML is different from SVG (Scalable Vector Graphics). According to the W3C’s definition of SVG, it is “a platform for two-dimensional graphics … (with) two parts: an XML-based file format and a programming API for graphical applications.” While XAML is an XML-based file format, it is not an API. XAML also supports things like 3D and controls, which SVG does not.
• One great benefit of XAML is that it helps to separate design and development, which actually helps to improve collaboration and efficiency between designers and software developers. As the XAML markup for an application’s UI remains separate from the remainder of application logic, a designer’s exact layout can be saved in XAML and combined with the application without affecting the development process.
• XAML documents are saved as .xaml files.

What is WPF?

(Windows Presentation Foundation; formerly Avalon)

WPF is the new presentation API (Application Programming Interface) in .NET Framework 3.0 (formerly WinFX).

Users can program directly against the API with .NET, instantiate (render) WPF objects by expressing them in XAML, or employ a mixture of XAML with .NET code behind.

The WPF API has a wide range of functionality, from Windows controls like buttons to 3D graphics, special effects and multimedia. WPF enables the creation of items that presently require different file formats – for example, the equivalent of PDF, HTML, WinForms and Flash can be developed with WPF.

For more details on WPF, check out msdn’s Windows Presentation Foundation section.

What is a XBAP?

(XAML Browser Application; formerly WBA or Web Browser Application)

A XBAP, or XAML Browser Application allows a WPF/XAML-based application to run in an Internet browser without installing on the user’s computer.

Microsoft Corporation states:

[a]pplications can be deployed from a server to a system with a single click. The application then runs in the browser without any interruptions beyond the time needed to download the application. However, unlike … HTML-based applications, XAML Browser Applications have access to the rich features of the Windows Presentation Foundation (formerly code-named “Avalon”) runtime.

Excerpt taken from www.xaml.net

FSMs (For Financial Apps)

Finite state machine design can become a religious issue.  What is the best style for a finite state machine?  Should the human or the machine perform state assignment?  How do we design safe finite state machines?  There is no best answer for all situations and there is no magical style to be checked.  It does, however, have to follow the basic principles of good logic design.  It is noted that many engineers now use HDLs to design the state machine and never see the logic.  This must be done with extreme care for critical applications.Some design guidelines for high-reliability circuits mandate that one-hot state machines not be used since the larger number of flip-flops increase the probability of an SEU.  While true, a careful analysis of the state machines shows that the one-hot topology has a Hamming distance of 2, making all single bit errors detectable.  By comparison, an equivalent binary coded state machine has a Hamming distance of 1 and, while not having any lockup states if all 2ⁿ states are used, you can not detect illegal transitions without an extra checking mechanism, which itself will be subject to SEUs and together will have lockup states.

A.1 Strategy and Analysis of Lockup States – Schematic-based machines: For critical state machines, the analysis must cover all possible logic states and demonstrate that the machine behaves in a deterministic and desired fashion.  The analysis must consider off-nominal events.  One such example is an SEU, a credible failure mode.  Finite state machines in many consumer-grade IC’s do have lockup states, such as SDRAMs.  For critical controllers this is not acceptable.  Analysis should include all possible 2ⁿ states.  It is a credible failure mode to be in any of these states as a result of a disturbance on the power bus, an ESD event, etc.  Any high reliability machine must be robust under all credible failure modes.  Additionally, one must ensure that the FSM starts out in a legal state and than transitions through the desired sequences.  One method is to use a power-on reset (POR) indicator.  This must be checked to ensure that it is synchronous with the clock.  It is not necessary to have the POR go into the asynchronous or reset input of every flip-flop.  Indeed, this is often undesirable as it increases the load on the reset signal distribution and makes it tougher to meet removal times for all flip-flops in high-speed circuits.  Indeed, one may not need any reset for a finite state machine if it can be shown to always go into a desired state.  This can be done in the trivial case of a divide by n master counter, for example, where a reset is not needed and a fault on the reset line can halt the machine.  Another technique is to gate the inputs with the POR signal and design an FSM such that it is guaranteed to go into a hold state.  One consideration with the reset function is design-for-test and design-for-simulation, which sometimes results in additional reset connections.

A.2 Strategy and Analysis of Lockup States – HDL Synthesized Machines: Obviously, all of the criteria for schematic-based machines apply.  However, there are special considerations for designing with HDL, as the CAE writer might generate circuits that are not desirable for high-reliable circuits.  Hence, for critical circuits, one must examine the output reports from the synthesizer very carefully.  Common things to check for include: lockup states; outputs of Gray encoded machines that can glitch: unintended flip-flop replication; not implementing the desired and specified style (sometimes the synthesizers just think they know better than the human and will substitute one type of state machine for another).  Additionally, some logic synthesizers will generate “safe” state machines.  Examine the generated design carefully.  For instance, it has been seen that sometimes the logic will explode with excessive gates.  Other times there are resets generated on the opposite edge of the clock resulting in tight timing for the removal of clears which are not visible to the designer.  Note that languages such as VHDL can not cover all physical states, just logical ones.  Hence, the “others” clause will only refer to states in the enumerated type and not the physical realization.  The HDL doesn’t know if it is a one-hot or binary or gray coded implementation and what flip-flops have been replicated.  This is not detectable at the black box simulation level nor by Boolean equations for logical equivalence.

B. Flip-Flop Replication:

Logic designers often replicate logic for reliability or performance reasons. For example, if the load on an output is too high, then the load will often be split between multiple drivers (in some cases outputs may be joined together but this is not preferred and is usually avoidable). In other cases, cutting the load and duplicating the driver can help make timing by distributing the capacitive load. The replication of combinational logic is quite straightforward.

However, if this concept is extended to sequential logic and finite state machine design then the situation is trickier since state information is involved. Indeed, the logic may present different information to different parts of the circuit and, for example, may be inconsistent in the presence of a trasient fault such as a single event upset, ESD event, etc. That is, the logical flip-flop can present different values to different parts of the circuit depending on which physical flip-flop they connected to. This is a call for caution in high-reliability applications. Software CAE tools are more than happy to generate circuits of this class and do not generate logic to ensure self-consistency.  Examples are given in an application note.

C. Error Detection and Correction Requirements and Implementation: It is often tempting to design robust state machines by simply appending a Hamming code and correction circuits.  If you realize that SEUs or ESD events are not synchronized to the system clock and that the logic network is not guaranteed to be glitch free, then you will have second thoughts about the ability of this type of structure to provide robust operation.  In the general case, you must analyze the combinational circuits which implement the next-state logic and their inputs to the flip-flops making up the state register.  In particular, for any of these schemes, you must look at whether or not the circuit implementations are static hazard free and, if not, can an erroneous transition to a state (or set of states) be made.

References, Notes, and Related

Documents

1. For visibility into the operation of the system, debug, and test, bring FSM state flip-flops to spare I/Os and test points.
2. “Sequential Circuit Design for Spaceborne and Critical Electronics,” R. Barto, presented at the 2000 MAPLD International Conference. 
3. “Logic Design: Clocking, Timing Analysis, Finite State Machines, and Verification,” Presented at the 2002 MAPLD International Conference, Laurel, MD, September 9, 2002. 
4. Flip-Flop Replication.  This application note gives an introduction to the topic and examples.  Cases examined are VHDL synthesis, netlist translation, and backend place and routing.
5. “XC4000XL/Spartan PAR – Router duplicates registers for use as output-to-output route-thrus,”^XL Xilinx answers database #3813.
6. “Asynchronous & Synchronous Reset Design Techniques – Part Deux”
7. “Startup Transient,” from Advanced Design: Designing for Reliability, 2001 MAPLD International Conference, Laurel, MD, September 10, 2001.
8. Analysis of POR Circuit Topologies
9. Discussion of MetastableStates
10. Timing Analysis of Asynchronous Signals